US Citizenship Required = Must be willing to obtain a Secret clearance

Work in a small team environment to develop FPGA gateware for driving the next generation of TapHere! SDR solutions. Candidate will be responsible for producing and improving gateware that enables TapHere! hardware to function. Work will be done remotely or from the TapHere! Radio Lab depending on the immediate requirements of the current project.

• BS degree in STEM field supporting a Digital Design Engineering role (examples include Electrical Engineering, Computer Engineering etc.) preferred
• 2-3+ years of professional experience using Xilinx Vivado tools to generate and test gateware for Xilinx FPGAs with Verilog
• Experience with Microblaze soft processors
• Experience with Xilinx 7-Series FPGAs, particularly Artix and Zynq. (Virtex/Kintex a plus)
• Experience with designing custom AXI IPs
• Experience with PCI Express FPGA usage and IP (Thunderbolt a plus)
• Experience with JESD204B/C FPGA usage and IP
• Experience with SPI, I2C, UART, etc usage in FPGAs.
• Experience with high-speed ADCs/DACs usage in FPGAs
• Experience with DDR3/2 DRAM usage in FPGAs
• Experience taking functional product requirements and translating them into working prototypes
• Experience with timing closure and static timing analysis
• Good understanding of FPGA gateware design and test principles particularly in support of Software Defined Radio platforms

Desired Additional Experience (Optional)
- Experience with DDR3/2 DRAM usage in FPGAs
-USB 3/2 usage in FPGAs
- Ability to implement common DSP blocks (filtering, resampling, control loops, etc) in Verilog
- Ability to program ARM microcontrollers using C (some products use a low power microcontroller instead of FPGA)
- Ability to use Xilinx Vitis to generate executable code for soft/hard processors
- Usage of common lab equipment for digital bus analysis (logic analyzers, oscilloscopes, etc.)
- Comfortable working in both Linux and Windows environments

• Ability to write FPGA modules and test benches in System Verilog
• Ability to troubleshoot live hardware running your gateware
• Uses good digital logic design principles to design area or power minimal FPGA bitstreams that make for effective software defined radios

Compensation package includes base salary and benefits. Base salary depends on requirements for education/degree, skills, and professional experience. Annualized base salary range for this position is: $85K and up